Silicon Validation Engineer
- Employment
- Full-time
- Company size
- Startup
Open to US only. Set where you work from to check your eligibility.
Core skills
Required skills
Optional skills
Required languages
What MatX Is Building MatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies. What You'll Do Here
Own silicon bring-up and validation from first power-on through feature validation and production readiness. Develop and execute validation plans for chip-level and SiP-level functionality, performance, reliability, and system behavior. Validate boot, reset, initialization, power management, recovery, memory, interconnect, high-speed interfaces, and package-level functionality. Work across Top-level DV, Palladium emulation, lab validation, and package validation to improve coverage and correlation between environments. Debug complex failures using logs, registers, traces, waveforms, firmware output, and lab equipment. Analyze issues across RTL, firmware, software, board, package, and silicon boundaries. Collaborate with architecture, design, DV, emulation, firmware, software, and product engineering teams. Define observability and debug requirements and improve validation automation, execution, and failure triage.
Who You Are
Strong hands-on experience in silicon validation, post-silicon bring-up, hardware emulation, Top-level DV, or a related field. Experience validating complex SoCs, accelerators, or highly integrated silicon products. Strong understanding of digital hardware, SoC architecture, and hardware-firmware interaction. Proven ability to debug complex cross-functional failures and drive them to root cause. Experience working with real silicon and lab platforms. Familiarity with firmware, embedded software, drivers, and low-level hardware access. Ability to read and understand C or C++ code for debug purposes. Python or similar scripting experience. Ability to read specifications, register descriptions, validation plans, and relevant RTL. Strong ownership, communication, and cross-functional collaboration skills.
Bonus Points If You Have
Experience with both pre-silicon and post-silicon validation. Experience with Cadence Palladium. Experience with SystemVerilog, UVM, assertions, coverage, or waveform debug. Experience bringing up first silicon. Experience with HBM, DDR, PCIe, CXL, Ethernet, die-to-die interfaces, or advanced packaging. Familiarity with JTAG, oscilloscopes, logic analyzers, or protocol analyzers.
Compensation The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.
Early Career - $120,000 - $275,000 + equity Mid Career - $175,000 - $450,000 + equity Senior Career - $275,000 - $475,000 + equity
What We Offer
A Stake in our success A cash/equity mix that fits your needs and option to do early exercise Health & Wellness Company subsidized Health, Dental, Vision, and Life insurance; Pre-tax Health Savings Accounts with generous company contribution (even if you don’t) Time To Recharge 4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year Support to Parents Up to 12 weeks of paid parental leave, regardless of your path to parenthood Learning & Development $1,500 yearly towards your professional development e.g. conferences, courses, and other learning opportunities Team Connection Team Lunches, quarterly off-sites, and regular town halls Financial Wellbeing 401K and/or Roth IRA, with 5% company contribution, even if you don’t! Flexible Spending Accounts Pre-tax spend accounts for medical, dental/vision, dependent care, parking, and transit expenses Commute On Us For those commuting up to 1 hour, put your rideshare cost on our company card and reclaim the drive-time to get work done! MatX E[x]tras $50 per month to use on the perks you care about most Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi expense reimbursement
As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status,
What you'll do
- Own silicon bring-up and validation from first power-on through feature validation and production readiness.
- Develop and execute validation plans for chip-level and SiP-level functionality, performance, reliability, and system behavior.
- Validate boot, reset, initialization, power management, recovery, memory, interconnect, high-speed interfaces, and package-level functionality.
- Work across Top-level DV, Palladium emulation, lab validation, and package validation to improve coverage and correlation between environments.
- Debug complex failures using logs, registers, traces, waveforms, firmware output, and lab equipment.
- Analyze issues across RTL, firmware, software, board, package, and silicon boundaries.
- Collaborate with architecture, design, DV, emulation, firmware, software, and product engineering teams.
- Define observability and debug requirements and improve validation automation, execution, and failure triage.
What they require
- Strong hands-on experience in silicon validation, post-silicon bring-up, hardware emulation, Top-level DV, or a related field.
- Experience validating complex SoCs, accelerators, or highly integrated silicon products.
- Strong understanding of digital hardware, SoC architecture, and hardware-firmware interaction.
- Proven ability to debug complex cross-functional failures and drive them to root cause.
- Experience working with real silicon and lab platforms.
- Familiarity with firmware, embedded software, drivers, and low-level hardware access.
- Ability to read and understand C or C++ code for debug purposes.
- Python or similar scripting experience.
- Ability to read specifications, register descriptions, validation plans, and relevant RTL.
- Strong ownership, communication, and cross-functional collaboration skills.
- Preferred: Experience with both pre-silicon and post-silicon validation.
- Preferred: Experience with Cadence Palladium.
- Preferred: Experience with SystemVerilog, UVM, assertions, coverage, or waveform debug.
- Preferred: Experience bringing up first silicon.
- Preferred: Experience with HBM, DDR, PCIe, CXL, Ethernet, die-to-die interfaces, or advanced packaging.
- Preferred: Familiarity with JTAG, oscilloscopes, logic analyzers, or protocol analyzers.
Benefits
- A cash/equity mix that fits your needs and option to do early exercise
- Company subsidized Health, Dental, Vision, and Life insurance
- Pre-tax Health Savings Accounts with generous company contribution
- 4 weeks paid time off (accrued)
- 12 company holidays
- 3 weeks remote/flexible work per year
- Up to 12 weeks of paid parental leave, regardless of your path to parenthood
- $1,500 yearly towards your professional development e.g. conferences, courses, and other learning opportunities
- Team Lunches, quarterly off-sites, and regular town halls
- 401K and/or Roth IRA, with 5% company contribution
- Pre-tax spend accounts for medical, dental/vision, dependent care, parking, and transit expenses
- For those commuting up to 1 hour, put your rideshare cost on our company card and reclaim the drive-time to get work done!
- $50 per month to use on the perks you care about most
- We work remotely Monday & Friday, supported by home-tech setup, and remote wifi expense reimbursement
MatX is building custom silicon for large-language-model inference and training, with HW/SW co-design across ISA, RTL, simulator, compiler, and kernels so each layer benefits from the others. The runtime owns the host-side stack and the contracts that bind those teams together.